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期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

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共收录本刊相关文章索引1430条
Clinical Trial Case Reports Meta-Analysis RCT Review Systematic Review
Classical Article Case Reports Clinical Study Clinical Trial Clinical Trial Protocol Comment Comparative Study Editorial Guideline Letter Meta-Analysis Multicenter Study Observational Study Randomized Controlled Trial Review Systematic Review
Actively Alleviate Power Gating-Induced Power/Ground Noise Using Parasitic Capacitance of On-Chip Memories in MPSoC [0.03%] 利用片上存储器的寄生电容，主动缓解多核片上系统中电源门控引起的电源/地噪声。
Wang, Xuan; Xu, Jiang; Zhang et al. Wang et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(2):266-279. DOI:10.1109/TVLSI.2014.2306959 2015
Low-power operation using self-timed circuits and adaptive scaling of the supply voltage [0.03%] 采用自定时电路和自适应电源电压调节的低功耗运行模式
Nielsen, L.S.; Niessen, C.; Sparso et al. Nielsen et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1994;2(4):391-397. DOI:10.1109/92.335008 1994
VLSI array algorithms and architectures for RSA modular multiplication [0.03%] 用于RSA模乘的VLSI阵列算法与体系结构
Yong-Jin Jeong, ; Burleson, W.P. Yong-Jin Jeong
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1997;5(2):211-217. DOI:10.1109/92.585224 1997
Design and Performance Evaluation of Radiation Hardened Latches for Nanoscale CMOS [0.03%] 纳米级CMOS辐射加固锁存器的设计与性能评估
Lin, Sheng; Kim, Yong-Bin; Lombardi et al. Lin et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2011;19(7):1315-1319. DOI:10.1109/TVLSI.2010.2047954 2011
Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy Block [0.03%] 采用定宽副本冗余块的可靠低功耗乘法器设计
Wey, I-Chyn; Peng, Chien-Chang; Liao et al. Wey et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(1):78-87. DOI:10.1109/tvlsi.2014.2303487 2015
Ultra-High Throughput Low-Power Packet Classification [0.03%] 超高吞吐量低功耗包分类
Kennedy, Alan; Wang, Xiaojun Kennedy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(2):286-299. DOI:10.1109/TVLSI.2013.2241798 2014
Multiple-Vote Symbol-Flipping Decoder for Nonbinary LDPC Codes [0.03%] 用于非二进制LDPC码的多投票符号翻转解码器
Garcia-Herrero, Francisco; Li, Erbao; Declercq et al. Garcia-Herrero et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(11):2256-2267. DOI:10.1109/TVLSI.2013.2292900 2014
Fault-tolerant self-organizing map implemented by wafer-scale integration [0.03%] 采用晶圆级集成实现的容错自组织映射
Yasunaga, M.; Hachiya, I.; Moki et al. Yasunaga et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1998;6(2):257-265. DOI:10.1109/92.678883 1998
Introduction to generalized symbolic trajectory evaluation [0.03%] 广义符号轨迹评估简介
Jin Yang, ; Seger, C.-J.H. Jin Yang
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2003;11(3):345-353. DOI:10.1109/TVLSI.2003.812320 2003
Circuit-Level Design Approaches for Radiation-Hard Digital Electronics [0.03%] 抗辐射数字电子电路级设计方法
Garg, R.; Jayakumar, N.; Khatri et al. Garg et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(6):781-792. DOI:10.1109/TVLSI.2008.2006795 2009