IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(1):78-87. doi: 10.1109/tvlsi.2014.2303487 Q23.22025

Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy Block

采用定宽副本冗余块的可靠低功耗乘法器设计

DOI: 10.1109/tvlsi.2014.2303487

摘要

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