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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(2):266-279. doi: 10.1109/TVLSI.2014.2306959 Q23.22025

Actively Alleviate Power Gating-Induced Power/Ground Noise Using Parasitic Capacitance of On-Chip Memories in MPSoC

利用片上存储器的寄生电容,主动缓解多核片上系统中电源门控引起的电源/地噪声。

Wang, Xuan; Xu, Jiang; Zhang, Wei; Wu, Xiaowen; Ye, Yaoyao; Wang, Zhehui; Nikdast, Mahdi; Wang, Zhe

DOI: 10.1109/TVLSI.2014.2306959

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Copyright © IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 中文内容为AI机器翻译,仅供参考!

期刊名:Ieee transactions on very large scale integration (vlsi) systems

缩写:IEEE T VLSI SYST

ISSN:1063-8210

e-ISSN:1557-9999

IF/分区:3.2/Q2

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Actively Alleviate Power Gating-Induced Power/Ground Noise Using Parasitic Capacitance of On-Chip Memories in MPSoC