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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1997;5(2):211-217. doi: 10.1109/92.585224 Q23.22025

VLSI array algorithms and architectures for RSA modular multiplication

用于RSA模乘的VLSI阵列算法与体系结构

Yong-Jin Jeong, ; Burleson, W.P.

DOI: 10.1109/92.585224

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Copyright © IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 中文内容为AI机器翻译,仅供参考!

期刊名:Ieee transactions on very large scale integration (vlsi) systems

缩写:IEEE T VLSI SYST

ISSN:1063-8210

e-ISSN:1557-9999

IF/分区:3.2/Q2

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VLSI array algorithms and architectures for RSA modular multiplication