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期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

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共收录本刊相关文章索引1430条
Clinical Trial Case Reports Meta-Analysis RCT Review Systematic Review
Classical Article Case Reports Clinical Study Clinical Trial Clinical Trial Protocol Comment Comparative Study Editorial Guideline Letter Meta-Analysis Multicenter Study Observational Study Randomized Controlled Trial Review Systematic Review
Reliability-Oriented Placement and Routing Algorithm for SRAM-Based FPGAs [0.03%]
Huang, Keheng; Hu, Yu; Li et al. Huang et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(2):256-269. DOI:10.1109/TVLSI.2013.2239318 2014
Subthreshold Dual Mode Logic [0.03%]
Kaizerman, Asaf; Fisher, Sagi; Fish et al. Kaizerman et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(5):979-983. DOI:10.1109/TVLSI.2012.2198678 2013
A survey of power estimation techniques in VLSI circuits [0.03%]
Najm, F.N. Najm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1994;2(4):446-455. DOI:10.1109/92.335013 1994
Energy Efficiency Optimization Through Codesign of the Transmitter and Receiver in High-Speed On-Chip Interconnects [0.03%]
Weng, Shih-Hung; Zhang, Yulei; Buckwalter et al. Weng et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(4):938-942. DOI:10.1109/TVLSI.2013.2255070 2014
Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding [0.03%]
Kim, HoonSeok; Won, Chanyoun; Franzon et al. Kim et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(8):1562-1567. DOI:10.1109/TVLSI.2012.2213281 2013
Symbolic Moment Computation for Statistical Analysis of Large Interconnect Networks [0.03%]
Hao, Zhigang; Shi, Guoyong; Tan et al. Hao et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(5):944-957. DOI:10.1109/TVLSI.2012.2197835 2013
Mitigating the Impact of Process Variation on the Performance of 3-D Integrated Circuits [0.03%]
Garg, Siddharth; Marculescu, Diana Garg
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(10):1903-1914. DOI:10.1109/TVLSI.2012.2226762 2013
Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout [0.03%]
Kim, Dae Hyun; Athikulwongse, Krit; Lim et al. Kim et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(5):862-874. DOI:10.1109/TVLSI.2012.2201760 2013
A Unified Detection Scheme for Crosstalk Effects in Interconnection Bus [0.03%]
Shu-Min Li, K.; Chung-Len Lee, ; Chauchin Su et al. Shu-Min Li et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(2):306-311. DOI:10.1109/TVLSI.2008.2004548 2009
Unified Capture Scheme for Small Delay Defect Detection and Aging Prediction [0.03%]
Jin, Song; Han, Yinhe; Li et al. Jin et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(5):821-833. DOI:10.1109/TVLSI.2012.2197766 2013