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期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

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共收录本刊相关文章索引1430条
Clinical Trial Case Reports Meta-Analysis RCT Review Systematic Review
Classical Article Case Reports Clinical Study Clinical Trial Clinical Trial Protocol Comment Comparative Study Editorial Guideline Letter Meta-Analysis Multicenter Study Observational Study Randomized Controlled Trial Review Systematic Review
Design Optimizations for Tiled Partially Reconfigurable Systems [0.03%]
Koester, Markus; Luk, Wayne; Hagemeyer et al. Koester et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2011;19(6):1048-1061. DOI:10.1109/TVLSI.2010.2044902 2011
CMOS sensors for on-line thermal monitoring of VLSI circuits [0.03%]
Szekely, V.; Marta, C.; Kohari et al. Szekely et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1997;5(3):270-276. DOI:10.1109/92.609869 1997
Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies [0.03%]
Anis, M.H.; Allam, M.W.; Elmasry et al. Anis et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2002;10(2):71-78. DOI:10.1109/92.994977 2002
Efficient Modulo $2^{n}+1$ Multipliers [0.03%]
Chen, Jian Wen; Yao, Ruo He; Wu et al. Chen et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2011;19(12):2149-2157. DOI:10.1109/TVLSI.2010.2080330 2011
Ground Switching Load Modulation With Ground Isolation for Passive HF RFID Transponders [0.03%]
Yunlei Li, ; Jin Liu, ; Hoi Lee Yunlei Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(8):1443-1452. DOI:10.1109/TVLSI.2011.2160102 2012
Dynamic Thermal Management Under Soft Thermal Constraints [0.03%]
Shi, Bing; Zhang, Yufu; Srivastava et al. Shi et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(11):2045-2054. DOI:10.1109/TVLSI.2012.2227854 2013
LASIC: Loop-Aware Sleepy Instruction Caches Based on STT-RAM Technology [0.03%]
Junwhan Ahn, ; Kiyoung Choi, Junwhan Ahn
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(5):1197-1201. DOI:10.1109/TVLSI.2013.2265278 2014
Power-Planning-Aware Soft Error Hardening via Selective Voltage Assignment [0.03%]
Wu, Kai-Chiang; Marculescu, Diana Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(1):136-145. DOI:10.1109/TVLSI.2012.2236658 2014
Performance-Oriented Parameter Dimension Reduction of VLSI Circuits [0.03%]
Zhuo Feng, ; Peng Li Zhuo Feng
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(1):137-150. DOI:10.1109/TVLSI.2008.2002489 2009
Design of Network-on-Chip Architectures With a Genetic Algorithm-Based Technique [0.03%]
Leary, G.; Srinivasan, K.; Mehta et al. Leary et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(5):674-687. DOI:10.1109/TVLSI.2008.2011205 2009