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期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

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共收录本刊相关文章索引1430条
Clinical Trial Case Reports Meta-Analysis RCT Review Systematic Review
Classical Article Case Reports Clinical Study Clinical Trial Clinical Trial Protocol Comment Comparative Study Editorial Guideline Letter Meta-Analysis Multicenter Study Observational Study Randomized Controlled Trial Review Systematic Review
Improving Error Tolerance for Multithreaded Register Files [0.03%] 提高多线程寄存器文件的容错能力
Lei Wang, ; Patel, N. Lei Wang
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2008;16(8):1009-1020. DOI:10.1109/TVLSI.2008.2000521 2008
Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing [0.03%] 面向高吞吐量和可扩展FFT处理的应用专用指令集处理器的分层设计
Guan, Xuan; Fei, Yunsi; Lin et al. Guan et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(3):551-563. DOI:10.1109/TVLSI.2011.2105512 2012
Impact on Performance and Energy of the Retention Time and Processor Frequency in L1 Macrocell-Based Data Caches [0.03%] 基于L1宏单元的数据缓存中保留时间和处理器频率对性能与能耗的影响
Valero, Alejandro; Sahuquillo, Julio; Lorente et al. Valero et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(6):1108-1117. DOI:10.1109/TVLSI.2011.2142202 2012
Quantifying and enhancing power awareness of VLSI systems [0.03%] 量化并提升VLSI系统的功耗意识
Bhardwaj, M.; Min, R.; Chandrakasan et al. Bhardwaj et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2001;9(6):757-772. DOI:10.1109/92.974890 2001
Fully Reused VLSI Architecture of FM0/Manchester Encoding Using SOLS Technique for DSRC Applications [0.03%] 用于DSRC应用的基于SOLS技术的FM0/曼彻斯特编码全复用VLSI架构
Lee, Yu-Hsuan; Pan, Cheng-Wei Lee
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(1):18-29. DOI:10.1109/TVLSI.2014.2299532 2015
Signal Processing With Direct Computations on Compressively Sensed Data [0.03%] 基于压缩感知数据的直接计算信号处理
Shoaib, Mohammed; Jha, Niraj K.; Verma et al. Shoaib et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(1):30-43. DOI:10.1109/TVLSI.2014.2301733 2015
Digitally Controlled Pulse Width Modulator for On-Chip Power Management [0.03%] 用于片上电源管理的数字控制脉宽调制器
Vaisband, Inna; Azhar, Mahmood; Friedman et al. Vaisband et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(12):2527-2534. DOI:10.1109/tvlsi.2013.2294402 2014
Power Network Optimization Based on Link Breaking Methodology [0.03%] 基于链路切断方法的电网优化
Jakushokas, Renatas; Friedman, Eby G. Jakushokas
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(5):983-987. DOI:10.1109/TVLSI.2012.2201186 2013
Z-TCAM: An SRAM-based Architecture for TCAM [0.03%] Z-TCAM：一种基于SRAM的TCAM架构
Ullah, Zahid; Jaiswal, Manish K.; Cheung et al. Ullah et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(2):402-406. DOI:10.1109/tvlsi.2014.2309350 2015
A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory [0.03%] 一种基于存内逻辑的大型声学模型与大词汇量语音识别加速器的通用且可扩展架构
Bapat, Ojas A.; Franzon, Paul D.; Fastow et al. Bapat et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(12):2701-2712. DOI:10.1109/TVLSI.2013.2296526 2014