Micro-operation cache: a power aware frontend for variable instruction length ISA [0.03%]
微操作缓存:一种面向可变指令长度ISA的节能前端设计
Solomon, B.; Mendelson, A.; Ronen et al.
Solomon et al.
Fast Sign Detection Algorithm for the RNS Moduli Set $\{2^{n+1}-1, 2^{n}-1, 2^{n}\}$ [0.03%]
基于RNS模数集〈inline-formula〉〈tex-math notation=\"LaTeX\">$\\\\\\\\{2^{n+1}-1, 2^{n}-1, 2^{n}\\\\\\\\}$的快速符号检测算法
Xu, Minghe; Bian, Zhenpeng; Yao et al.
Xu et al.
Reda, S.; Smith, G.; Smith et al.
Reda et al.
A Clock Control Strategy for Peak Power and RMS Current Reduction Using Path Clustering [0.03%]
一种基于路径聚类的时钟控制策略,用于降低峰值功率和均方根电流
Hyman, Ransford; Ranganathan, Nagarajan; Bingel et al.
Hyman et al.
Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits [0.03%]
栅极扩散输入(GDI):一种面向数字组合电路的节能方法
Morgenshtein, A.; Fish, A.; Wagner et al.
Morgenshtein et al.
Lee, Dongsoo; Roy, Kaushik
Lee
Fourier Series Approximation for Max Operation in Non-Gaussian and Quadratic Statistical Static Timing Analysis [0.03%]
非高斯与二次统计静态时序分析中最大运算的傅里叶级数逼近
Lerong Cheng, ; Fang Gong, ; Wenyao Xu et al.
Lerong Cheng et al.
Shanq-Jang Ruan, ; Chi-Yu Wu, ; Jui-Yuan Hsieh et al.
Shanq-Jang Ruan et al.
Split-SAR ADCs: Improved Linearity With Power and Speed Optimization [0.03%]
分段式SAR ADC:在优化功耗与速度的同时提升线性度
Zhu, Yan; Chan, Chi-Hang; Chio et al.
Zhu et al.