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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2008;16(3):331-335. doi: 10.1109/TVLSI.2007.915514 Q23.22025

Low Power Design of Precomputation-Based Content-Addressable Memory

基于预计算的内容寻址存储器的低功耗设计

Shanq-Jang Ruan, ; Chi-Yu Wu, ; Jui-Yuan Hsieh,

DOI: 10.1109/TVLSI.2007.915514

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Copyright © IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 中文内容为AI机器翻译,仅供参考!

期刊名:Ieee transactions on very large scale integration (vlsi) systems

缩写:IEEE T VLSI SYST

ISSN:1063-8210

e-ISSN:1557-9999

IF/分区:3.2/Q2

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Low Power Design of Precomputation-Based Content-Addressable Memory