Ieee transactions on very large scale integration (vlsi) systems文章索引

期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

共收录本刊相关文章索引1430条

Cost-effective VLSI architectures and buffer size optimization for full-search block matching algorithms [0.03%] 面向全搜索块匹配算法的高性价比VLSI架构与缓冲区大小优化

Yuan-Hau Yeh, ; Chen-Yi Lee, Yuan-Hau Yeh

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1999;7(3):345-358. DOI:10.1109/92.784096 1999

GABIND: a GA approach to allocation and binding for the high-level synthesis of data paths [0.03%] GABIND：一种用于数据路径高层次综合的GA分配与绑定方法

Mandal, C.; Chakrabarti, P.P.; Ghose et al. Mandal et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2000;8(6):747-750. DOI:10.1109/92.902270 2000

Replicating Tag Entries for Reliability Enhancement in Cache Tag Arrays [0.03%] 在缓存标签数组中复制标签条目以增强可靠性

Wang, Shuai; Hu, Jie; Ziavras et al. Wang et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(4):643-654. DOI:10.1109/tvlsi.2011.2111469 2012

VLSI Design of an SVM Learning Core on Sequential Minimal Optimization Algorithm [0.03%] 基于序列最小优化算法的SVM学习核心的VLSI设计

Kuan, Ta-Wen; Wang, Jhing-Fa; Wang et al. Kuan et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(4):673-683. DOI:10.1109/tvlsi.2011.2107533 2012

Design of a Tri-Modal Multi-Threshold CMOS Switch With Application to Data Retentive Power Gating [0.03%] 一种三模多阈值CMOS开关的设计及其在数据保持型功耗门控中的应用

Pakbaznia, Ehsan; Pedram, Massoud Pakbaznia

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(2):380-385. DOI:10.1109/TVLSI.2010.2102054 2012

Scaling Energy Per Operation via an Asynchronous Pipeline [0.03%] 通过异步流水线实现每次操作的能量缩放

Marr, Bo; Degnan, Brian; Hasler et al. Marr et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(1):147-151. DOI:10.1109/tvlsi.2011.2178126 2013

Short Pulse Generation With On-Chip Pulse-Forming Lines [0.03%] 基于片上脉冲形成线的短脉冲产生

Yongtao Geng; Huan Zou; Chaojiang Li; Jiwei Sun; Haibo Wang; Pingshan Wang Yongtao Geng; Huan Zou; Chaojiang Li; Jiwei Sun; Haibo Wang; Pingshan Wang

Ieee transactions on very large scale integration (vlsi) systems. 2012;20(9):0-. DOI:10.1109/tvlsi.2011.2160103 2012

An On-Chip Network Fabric Supporting Coarse-Grained Processor Array [0.03%] 支持粗粒度处理器阵列的片上网络结构

Pham, Phi-Hung; Mau, Phuong; Kim et al. Pham et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(1):178-182. DOI:10.1109/tvlsi.2011.2181546 2013

Chen, T.-W.; Su, Y.-C.; Huang et al. Chen et al.

Ieee transactions on very large scale integration (vlsi) systems. 2012;20(12):0-. DOI:10.1109/tvlsi.2011.2170203 2012

Predictive Techniques for Projecting Test Data Volume Compression [0.03%] 预测技术用于预测测试数据量的压缩情况

Saeed, Samah Mohamed; Sinanoglu, Ozgur; Almukhaizim et al. Saeed et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(9):1762-1766. DOI:10.1109/tvlsi.2012.2217359 2013