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期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

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共收录本刊相关文章索引1430条
Clinical Trial Case Reports Meta-Analysis RCT Review Systematic Review
Classical Article Case Reports Clinical Study Clinical Trial Clinical Trial Protocol Comment Comparative Study Editorial Guideline Letter Meta-Analysis Multicenter Study Observational Study Randomized Controlled Trial Review Systematic Review
A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time [0.03%]
Moo-Young Kim, ; Dongsuk Shin, ; Hyunsoo Chae et al. Moo-Young Kim et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(10):1461-1469. DOI:10.1109/TVLSI.2008.2004591 2009
Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling [0.03%]
Crupi, F.; Alioto, M.; Franco et al. Crupi et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20(8):1487-1495. DOI:10.1109/TVLSI.2011.2159870 2012
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems [0.03%]
Chakraborty, Koushik; Roy, Sanghamitra Chakraborty
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(4):670-679. DOI:10.1109/TVLSI.2012.2199142 2013
Design and Application of Power Optimized High-Speed CMOS Frequency Dividers [0.03%]
Henzler, S.; Koeppe, S. Henzler
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2008;16(11):1513-1520. DOI:10.1109/TVLSI.2008.2001136 2008
Field programmable gate arrays and floating point arithmetic [0.03%]
Fagin, B.; Renard, C. Fagin
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1994;2(3):365-367. DOI:10.1109/92.311646 1994
Inductive properties of high-performance power distribution grids [0.03%]
Mezhiba, A.V.; Friedman, E.G. Mezhiba
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2002;10(6):762-776. DOI:10.1109/TVLSI.2003.808683 2002
A Fast Locking-in and Low Jitter PLLWith a Process-Immune Locking-in Monitor [0.03%]
Li, Chung-Yi; Lee, Chung-Len; Hu et al. Li et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(10):2216-2220. DOI:10.1109/TVLSI.2013.2285977 2014
Active Filter-Based Hybrid On-Chip DC–DC Converter for Point-of-Load Voltage Regulation [0.03%]
Kose, Selçuk; Tam, Simon; Pinzon et al. Kose et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2013;21(4):680-691. DOI:10.1109/TVLSI.2012.2190539 2013
Design and analysis of an ultrawide-band distributed CMOS mixer [0.03%]
Safarian, A.Q.; Yazdi, A.; Heydari et al. Safarian et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2005;13(5):618-629. DOI:10.1109/TVLSI.2005.844288 2005
Robust interfaces for mixed-timing systems [0.03%]
Chelcea, T.; Nowick, S.M. Chelcea
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2004;12(8):857-873. DOI:10.1109/TVLSI.2004.831476 2004