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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015;23(3):507-519. doi: 10.1109/TVLSI.2014.2309663 Q23.22025

Demonstrating HW–SW Transient Error Mitigation on the Single-Chip Cloud Computer Data Plane

在单芯片云计算机数据平面上演示软硬件瞬态误差缓解

Rodopoulos, Dimitrios; Papanikolaou, Antonis; Catthoor, Francky; Soudris, Dimitrios

DOI: 10.1109/TVLSI.2014.2309663

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期刊名:Ieee transactions on very large scale integration (vlsi) systems

缩写:IEEE T VLSI SYST

ISSN:1063-8210

e-ISSN:1557-9999

IF/分区:3.2/Q2

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Demonstrating HW–SW Transient Error Mitigation on the Single-Chip Cloud Computer Data Plane