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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(4):771-778. doi: 10.1109/TVLSI.2013.2253338 Q23.22025

Design Flow for Flip-Flop Grouping in Data-Driven Clock Gating

数据驱动时钟门控中触发器分组的设计流程

Wimer, Shmuel; Koren, Israel

DOI: 10.1109/TVLSI.2013.2253338

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期刊名:Ieee transactions on very large scale integration (vlsi) systems

缩写:IEEE T VLSI SYST

ISSN:1063-8210

e-ISSN:1557-9999

IF/分区:3.2/Q2

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Design Flow for Flip-Flop Grouping in Data-Driven Clock Gating