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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2000;8(1):98-103. doi: 10.1109/92.820766 Q23.22025

Design of VHDL-based totally self-checking finite-state machine and data-path descriptions

基于VHDL的全自检有限状态机及数据通路描述的设计

Bolchini, C.; Montandon, R.; Salice, F.; Sciuto, D.

DOI: 10.1109/92.820766

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Copyright © IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 中文内容为AI机器翻译,仅供参考!

期刊名:Ieee transactions on very large scale integration (vlsi) systems

缩写:IEEE T VLSI SYST

ISSN:1063-8210

e-ISSN:1557-9999

IF/分区:3.2/Q2

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Design of VHDL-based totally self-checking finite-state machine and data-path descriptions