IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(3):516-521. doi: 10.1109/TVLSI.2013.2248764 Q23.22025
Design for Testability Support for Launch and Capture Power Reduction in Launch-Off-Shift and Launch-Off-Capture Testing
DOI: 10.1109/TVLSI.2013.2248764
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期刊名:Ieee transactions on very large scale integration (vlsi) systems
缩写:IEEE T VLSI SYST
ISSN:1063-8210
e-ISSN:1557-9999
IF/分区:3.2/Q2
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Design for Testability Support for Launch and Capture Power Reduction in Launch-Off-Shift and Launch-Off-Capture Testing
