IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(10):1534-1545. doi: 10.1109/TVLSI.2009.2027567 Q23.22025
Variable Input Delay CMOS Logic for Low Power Design
用于低功耗设计的可变输入延迟CMOS逻辑
DOI: 10.1109/TVLSI.2009.2027567
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2009;17(10):1534-1545. doi: 10.1109/TVLSI.2009.2027567 Q23.22025
DOI: 10.1109/TVLSI.2009.2027567
摘要 查看摘要