IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(3):631-640. doi: 10.1109/TVLSI.2013.2251430 Q23.22025
Mapping Loop Structures Onto Parametrized Hardware Pipelines
DOI: 10.1109/TVLSI.2013.2251430
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(3):631-640. doi: 10.1109/TVLSI.2013.2251430 Q23.22025
DOI: 10.1109/TVLSI.2013.2251430
摘要 查看摘要