IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(4):721-733. doi: 10.1109/TVLSI.2013.2252211 Q23.22025
Pulsed-Latch Utilization for Clock-Tree Power Optimization
DOI: 10.1109/TVLSI.2013.2252211
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014;22(4):721-733. doi: 10.1109/TVLSI.2013.2252211 Q23.22025
DOI: 10.1109/TVLSI.2013.2252211
摘要 查看摘要