IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2010;18(8):1220-1224. doi: 10.1109/TVLSI.2009.2021061 Q23.22025

On Reducing Test Power and Test Volume by Selective Pattern Compression Schemes

Chia-Yi Lin, ; Hsiu-Chuan Lin, ; Hung-Ming Chen,

DOI: 10.1109/TVLSI.2009.2021061

期刊名：Ieee transactions on very large scale integration (vlsi) systems

缩写：IEEE T VLSI SYST

ISSN：1063-8210

e-ISSN：1557-9999

IF/分区：3.2/Q2

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