PNP PIN bipolar phototransistors for high-speed applications built in a 180 nm CMOS process
{{output}}
This work reports on three speed optimized pnp bipolar phototransistors build in a standard 180 nm CMOS process using a special starting wafer. The starting wafer consists of a low doped p epitaxial layer on top of the p substrate. This low doped p epitaxial l... ...
